CHES 2024

September 4-7, 2024

Halifax, Canada

Call for Papers

General Information

Having been established in 1999, the Cryptographic Hardware and Embedded Systems (CHES) conference is the premier venue for research on both design and analysis of cryptographic hardware and software implementations. As an area conference of the International Association for Cryptologic Research (IACR), CHES bridges the cryptographic research and engineering communities, and attracts participants from academia, industry, government and beyond. CHES 2024 will take place in Halifax, Canada in September 4-7, 2024. The conference website is accessible at

The scope of CHES is intentionally diverse, meaning we solicit submission of papers on topics including, but not limited to, the following:

Cryptographic implementations:
  • Hardware architectures
  • Cryptographic processors and coprocessors
  • True and pseudorandom number generators
  • Physical unclonable functions (PUFs)
  • Efficient software implementation
  • SHARCS (Special-purpose HARdware for Cryptanalysis, quantum included)
Attacks against implementations, and countermeasures:
  • Remote, micro-architectural and physical side-channel attacks and countermeasures
  • Fault attacks and countermeasures
  • Hardware tampering and tamper-resistance
  • White-box cryptography and code obfuscation
  • Reverse engineering of hardware/software
Tools and methodologies:
  • Formal methods, techniques and tools for secure design and verification for hardware/software
  • Computer aided cryptographic engineering
  • Domain-specific languages for cryptographic systems
  • Metrics for the security of embedded systems
  • FPGA design security
Systematization of Knowledge (SoK)
Interactions between cryptographic theory and implementation issues:
  • Quantum cryptanalysis
  • Algorithm subversion and subversion prevention
  • New and emerging cryptographic algorithms and protocols targeting embedded devices
  • Theoretical hardware models that allow proofs
  • RISC-V security
  • Trusted execution environments and trusted computing platforms
  • IP protection for hardware/software and technologies for anti-counterfeiting
  • Reconfigurable hardware for cryptography
  • Secure elements, security subsystems, and applications
  • Security for the Internet of Things and cyberphysical systems (RFID, sensor networks, smart meters, medical implants, smart devices for home automation, industrial control, automotive, etc.)
  • Secure storage devices (memories, disks, etc.)
  • Isolation and monitoring hardware for cyberresilience
  • Engineering of zero-knowledge proof systems
  • Privacy-preserving computing in practice (MPC, FHE)

Paper Submission

Author instructions for paper submission are on the submissions page.

TCHES Publication Model

CHES has transitioned to an open-access journal/conference hybrid model. A comprehensive list of FAQs relating to the model can be found via the TCHES website at

In summary:

  1. Submitted papers will undergo a journal-style review process, with accepted papers published by Ruhr University Bochum in an issue of the journal IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES). Since it has a Gold Open Access status, all papers published in TCHES are immediately and freely available.
  2. The annual CHES conference consists of presentations for each paper published in the associated issues of TCHES, plus invited talks and a range of additional and social activities. All papers accepted for publication in TCHES between 15 July of year n − 1 and 15 July of year n will be presented at CHES of year n.

Program Committee

Program Co-Chairs

General Co-Chairs