Time:

9:00 — 17:30, Sunday, September 14, 2025

Location:

Meeting Room 305

Organizers:

• Aydin Aysu, North Carolina State University
• Fatemeh Ganji, Worcester Polytechnic Institute
• Patrick Schaumont, Worcester Polytechnic Institute
• Caner Tol, Worcester Polytechnic Institute

Abstract:

The OPTIMIST workshop is a forum to present and discuss new efforts that enable open and reproducible research in implementation security. The OPTIMIST emphasis is not on the artifacts themselves, but on the interfaces, components, libraries, hardware, and software tools that enable reproducibility and quality in implementation security testing.

Topics of interest:

Topics of interest for OPTIMIST include:

• Datasets pertaining to Side-channel Analysis and Fault Analysis
• Standard Libraries for Metrics in Implementation Security
• Standard Application Programming Interfaces for Security Measurement Instrumentation
• Standard Hardware Interfaces for Security Measurement Instrumentation
• Standard Firmware Libraries and Hardware Targets for Security Evaluation

Further information is available here.

Time:

9:00 — 17:30, Sunday, September 14, 2025

Location:

Meeting Room 306

Organizers:

• Michael Tunstall, Google, USA (General Chair)
• Luca Breveglieri, Politecnico di Milano, Itlay (Publication Chair)
• Israel Koren, University of Massachusetts, USA (Finance Chair)
• Alessandro Barenghi, Politecnico di Milano, Italy (Scientific Program Co-Chair)
• Juliane Krämer, University of Regensburg, Germany (Scientific Program Co-Chair)
• Fabrizio De Santis, Siemens, Germany (Sponsorship Chair)
• David Naccache, Ecole Normale Supérieure, France (Invited Talks Co-Chair)
• Jean-Pierre Seifert, Technische Universität Berlin & Telekom Innovation Laboratories, Germany (Invited Talks Co-Chair)

Abstract:

The Fault Diagnosis and Tolerance in Cryptography (FDTC) workshop brings together researchers and engineers from academia and industry who have an interest in the effect of faults, accidental or malicious, on digital devices that implement cryptographic algorithms. The FDTC workshop includes topics such as: modelling the reliability of cryptographic systems and protocols; reliable cryptographic systems and algorithms; fault models for HW and SW cryptographic devices; fault injection attacks on cryptographic systems and protocols; classical and novel techniques of fault diagnosis and tolerance for cryptographic systems; and case studies. To promote the exchange of ideas among active researchers in this field, the first workshop devoted to Fault Diagnosis and Tolerance in Cryptography (FDTC) was organized in June 2004, in Florence, Italy. The workshop has since then become an annual event which travels through Europe, America and Asia.

Further information is available here.

Time:

9:00 — 17:30, Sunday, September 14

Location:

Club Suite 4

Organizers:

• Zhang Xiaohu, Huawei Technologies, China
• Liu Zhuo, Huawei Technologies, China
• Liao Nan, Huawei Technologies, China
• Fan Junfeng, Open Security Research, China
• Zhang Fan, Zhejiang University, China
• Cui Yijun, Nanjing University of Aeronautics and Astronautics, China
• Wang Weijia, Shandong University, China

Abstract:

HISC@CHES 2025 is a workshop focusing on major industry trends and technology directions on hardware security and cryptography. At HISC, world leading researchers from academia, and top technical experts from industry, will come together to discuss the main industry trends and hot topics, share ideas on technology innovation and work together to push forward the development of industry.

The content of the workshop focuses on the following topics:

• Hardware Root of Trust
• Cryptographic Engineering and Evaluation
• Micro-architectural Secure Fuzzing
• SoC Security Verification
• PCB Tamper Protection
• Device Supply Chain Validation
• Hardware-based Anomaly Detection
• Side Channel and Fault Injection Analysis

Further information is available here.

Time:

14:00 — 17:30, Thursday, September 18, 2025

Location:

Meeting Room 306

Organizers:

• Maria Mushtaq, Télécom Paris, France

Abstract:

The goal of the PROOFS workshop is to promote methodologies that increase the confidence in the security of embedded systems, especially those which contain cryptographic algorithms. Concretely, the PROOFS workshop seeks contributions in both theory and practice of methods and tools applied to the security of embedded systems. Examples include formal and semi-formal methods, novel side-channel or fault attacks, simulation-based leakage evaluation and security checks, protocol verification techniques, test and verification of secure embedded systems (software and hardware), provable security for physical attacks, and design tools for early security assessment.

Further information is available here.

Time:

14:00 — 17:30, Thursday, September 18, 2025

Location:

Meeting Room 304

Organizers:

• Jan Pleskac, Tropic Square, Czech Republic
• Benedikt Gierlichs, KU Leuven, Belgium

Abstract:

The ORSHIN project explores a broad spectrum of security-related topics, including trusted lifecycle management, RISC-V microarchitectural leakage, masking techniques, and countermeasures against silicon reverse engineering. Additionally, it covers secure communication protocols designed for embedded devices, ensuring robust protection across various applications.

Time:

14:00 — 17:30, Thursday, September 18, 2025

Location:

Meeting Room 305

Organizers:

• Kun Yang, Zhejiang University, China
• Haoting Shen, Zhejiang University, China
• Xiaohang Wang, Zhejiang University, China
• Yang Yin, Geely R&D Center, China

Abstract:

Emerging techniques, such as AI, smart IoTs and high-performance chips, have significantly enhanced vehicle intelligence and connectivity. While it makes smart cars approaching L4 autonomous driving, the enlarged attack surface has consequently led to an exponential expansion of security risks. Although plenty of classic cybersecurity techniques have been applied on smart vehicles, customized systematic security designs and tests for the intelligent vehicles are still in a lack. We propose organizing the workshop to bring experts from academia, industry, and regulatory bodies, for exchanging ideas and sharing the latest advancements on this platform.

The workshop will cover 2 themes which is Theme 1: Industry Practices and Security Frameworks and Theme 2: Cutting-Edge Research and Technological Breakthroughs. This workshop aims to foster interdisciplinary collaboration, bringing together researchers, engineers, and policymakers to discuss cutting-edge solutions for securing intelligent vehicle systems. By facilitating technical discussions and knowledge sharing, this event will contribute to the advancement of next-generation secure automotive chips, ultimately enhancing the safety and trustworthiness of intelligent vehicles.

Further information is available here.